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Google, Qualcomm partner for RISC-V based Snapdragon Wear chipset

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© Reuters.

In a strategic partnership, Google (NASDAQ:) and Qualcomm (NASDAQ:) are jointly developing a RISC-V based Snapdragon Wear chipset, aiming to enhance the functionality of future Wear OS watches. The collaboration was disclosed on Tuesday and is expected to result in custom cores, superior performance, and low power consumption for the wearable devices.

This development comes on the heels of the Pixel Watch 2 launch, which is powered by Qualcomm’s Snapdragon W5 Gen 1 processor. As part of their joint venture, Google and Qualcomm are also working towards establishing a robust software ecosystem and compatible apps for the first commercial RISC-V powered Wear OS watches. However, no specific launch date for these products has been provided yet.

RISC-V is an open-source alternative to Arm architecture that could potentially lead to cost savings for consumers due to its open nature. Google’s official support for RISC-V in Android, announced in December 2022, along with a roadmap for its implementation, suggests a shift towards this architecture in the tech industry.

The move by Qualcomm and Google appears to be a strategic response to potential changes in Arm’s licensing model, which could require device manufacturers to pay royalties based on device value. This partnership signifies a significant stride in wearable tech advancement as it aims to expedite the smartwatch production process for Original Equipment Manufacturers (OEMs).

As revealed by The Next Web, Qualcomm’s engineering of a RISC-V-based platform for Google’s Wear OS will augment its Snapdragon Wear line that predominantly powers Wear OS devices. The innovative chip architecture of RISC-V brings performance and power advantages to wearable technology. Consequently, Qualcomm’s Snapdragon Wear platform innovations are set to rapidly evolve the Wear OS ecosystem.

This article was generated with the support of AI and reviewed by an editor. For more information see our T&C.

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